31 lines
562 B
Makefile
31 lines
562 B
Makefile
CC = gcc
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CFLAGS = -Wextra -g -Iinclude
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LIBS = -lm -lncurses
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# Directories
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SRC_DIR = src
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INC_DIR = include
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BUILD_DIR = build
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# Get all .c files from src directory
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SOURCES = $(wildcard $(SRC_DIR)/*.c)
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# Generate object file names in build directory
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OBJECTS = $(SOURCES:$(SRC_DIR)/%.c=$(BUILD_DIR)/%.o)
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TARGET = shell
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all: $(BUILD_DIR) $(TARGET)
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$(BUILD_DIR):
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mkdir -p $(BUILD_DIR)
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$(TARGET): $(OBJECTS)
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$(CC) $(CFLAGS) -o $@ $^ $(LIBS)
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$(BUILD_DIR)/%.o: $(SRC_DIR)/%.c
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$(CC) $(CFLAGS) -c $< -o $@
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clean:
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rm -rf $(BUILD_DIR) $(TARGET)
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.PHONY: all clean
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